Intel displays tech to build extreme multi-chiplet packages 12 times the size of the largest AI processors, beating TSMC’s biggest — floorplan the size of a cellphone, armed with HBM5, 14A compute tiles and 18A SRAM

Intel was the first company to build an explicitly disaggregated chiplet design, comprising 47 chiplets, with its Ponte Vecchio compute GPU for AI and HPC applications. This product still holds the record for the most populous multi-tile design, but Intel Foundry envisions something considerably more extreme: a multi-chiplet package that integrates at least 16 compute elements across eight base dies, 24 HBM5 memory stacks, and scales to 12X the size of the largest AI chips on the market ( 12x reticle…